- Create chips for about 100 students as a pilot service this year and

500+ students per year starting 2024

- ETRI, SNU, DIST Support production by reinforcing and interconnecting fabs

 Ministry of Science and ICT (MSIT) held an agreement and signing ceremony to promote the 'Semiconductor Design Verification Infrastructure Revitalization Project' at the Electronics and Telecommunications Research Institute (ETRI), signaling the full-scale launch of the Service to foster differentiated semiconductor design. This is one of the follow-up measures to President Yoon Seok-yeol's directive in June last year at the Cabinet meeting that "the semiconductor industry is all about fostering excellent human resources, so all ministries should make special efforts to foster talent."

  Undergraduate and graduate students majoring in semiconductor design will have opportunities to manufacture and verify their own chips through the service starting this year. If students apply to have their designs fabricated, semiconductor chips using 500nm CMOS (complementary metal-oxide-semiconductor) technology will be fabricated and packaged at semiconductor fabs operated by ETRI, Seoul National University(SNU), and Daegu Gyeongbuk National University of Science and Technology(DGIST), and provided to the student who carried out the design.

  The semiconductor design verification service for students was finalized in May last month, and after preparing the service, the pilot service will be provided once in the fourth quarter of this year. MSIT aims to provide 6 to 12 design verification services per year for the next four years, from 24 to 27. Based on this plan, it is estimated that more than 500 to 1,000 design students will be able to benefit from chip production every year.

 Minister Jong-ho Lee said, "In the context of fierce competition for semiconductor technology supremacy, fostering semiconductor talent is very important." "In order for Korea to secure system semiconductor competitiveness more efficiently, we need to actively introduce measures that are differentiated from competitors, and this project is one of them, and we will do our best to foster outstanding talents through it," he emphasized.

  For reference, students and professors in the field of semiconductor design who wish to receive the design verification pilot service to be conducted this year can contact the National Council on Aging Infrastructure.

For further information, please contact the Public Relations Division (Phone: +82-44-202-4033, E-mail: yunay@korea.kr) of the Ministry of Science and ICT.

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Please refer to the attached PDF.